1. Field of the Invention
The present invention relates to integrated circuits, and more specifically to a memory array architecture for standard sub 0.35 micron processes.
2. Description of the Related Art
Most integrated circuits ("chips") now in use are fabricated in what is called CMOS (complementary metal oxide semiconductor) technology, which forms both PMOS and NMOS transistors in a silicon substrate. One of the main objectives of integrated circuit technology is to minimize transistor size. Typically, transistors are described in terms of their minimum feature dimension. Current technology provides a minimum feature size of 0.35 .mu.m or less. The minimum feature size, which is also referred to as a "line width", refers to the minimum width of a transistor feature such as the gate width, or the separation between source and drain diffusions. Typically, 0.35 .mu.m technology is used to form CMOS transistors having a gate oxide thickness of 70 .ANG.. A 0.18 _.mu.m technology is used to form CMOS transistors having a gate oxide thickness of 40 .ANG.. The gate "oxide", actually a silicon dioxide layer, is the electrically insulating (dielectric) layer interposed between the conductive gate electrode, which is typically a polycrystalline silicon structure formed overlying the principal surface of the silicon substrate in which the integrated circuit is formed, and the underlying silicon which typically is the channel portion of the transistor extending between the source and drain regions. Transistors of 0.35 _.mu.m size typically operate at a voltage of 3.3 Volts. Transistors of 0.18 _.mu.m size typically operate at a voltage of 1.8 Volts. Greater voltages are likely to destroy the transistor by rupturing the gate oxide.
In the field of data storage, there are two main types of storage elements. The first type is a volatile storage element such as typically used in DRAM (dynamic random access memory) or SRAM (static random access memory) in which the information stored in a particular storage element is lost the instant that power is removed from the circuit. The second type is a non-volatile storage element in which the information is preserved even if power is removed. Typically, the types of transistor devices used to provide non-volatile storage are substantially different from those used in ordinary logic circuitry or in volatile storage, thereby requiring different fabrication techniques. Hence, if non-volatile storage is included on an integrated circuit fabricated using conventional CMOS technology, chip size and complexity are undesirably increased.
Thus, heretofore it has not possible to include non-volatile storage on a integrated circuit chip formed exclusively using standard CMOS processes.